[{"title":"Design Space Exploration for Memory Subsystems of VLIW Architectures","date_created":"2024-04-16T10:32:38Z","publication":"2010 IEEE Fifth International Conference on Networking, Architecture, and Storage","publication_status":"published","user_id":"220548","type":"conference","publication_identifier":{"isbn":["978-1-4244-8133-0"]},"page":"377-385","publisher":"IEEE","date_updated":"2026-03-17T15:29:02Z","doi":"10.1109/NAS.2010.14","conference":{"location":"Macau, China","name":"2010 IEEE International Conference on Networking, Architecture, and Storage (NAS)","start_date":"2010-07-15","end_date":"2010-07-17"},"status":"public","citation":{"ieee":"T. Jungeblut, G. Sievers, M. Porrmann, and U. Rückert, “Design Space Exploration for Memory Subsystems of VLIW Architectures,” in <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i>, Macau, China, 2010, pp. 377–385.","bibtex":"@inproceedings{Jungeblut_Sievers_Porrmann_Rückert_2010, title={Design Space Exploration for Memory Subsystems of VLIW Architectures}, DOI={<a href=\"https://doi.org/10.1109/NAS.2010.14\">10.1109/NAS.2010.14</a>}, booktitle={2010 IEEE Fifth International Conference on Networking, Architecture, and Storage}, publisher={IEEE}, author={Jungeblut, Thorsten and Sievers, Gregor and Porrmann, Mario and Rückert, Ulrich}, year={2010}, pages={377–385} }","apa":"Jungeblut, T., Sievers, G., Porrmann, M., &#38; Rückert, U. (2010). Design Space Exploration for Memory Subsystems of VLIW Architectures. In <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i> (pp. 377–385). Macau, China: IEEE. <a href=\"https://doi.org/10.1109/NAS.2010.14\">https://doi.org/10.1109/NAS.2010.14</a>","alphadin":"<span style=\"font-variant:small-caps;\">Jungeblut, Thorsten</span> ; <span style=\"font-variant:small-caps;\">Sievers, Gregor</span> ; <span style=\"font-variant:small-caps;\">Porrmann, Mario</span> ; <span style=\"font-variant:small-caps;\">Rückert, Ulrich</span>: Design Space Exploration for Memory Subsystems of VLIW Architectures. In: <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i> : IEEE, 2010, S. 377–385","chicago":"Jungeblut, Thorsten, Gregor Sievers, Mario Porrmann, and Ulrich Rückert. “Design Space Exploration for Memory Subsystems of VLIW Architectures.” In <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i>, 377–85. IEEE, 2010. <a href=\"https://doi.org/10.1109/NAS.2010.14\">https://doi.org/10.1109/NAS.2010.14</a>.","short":"T. Jungeblut, G. Sievers, M. Porrmann, U. Rückert, in: 2010 IEEE Fifth International Conference on Networking, Architecture, and Storage, IEEE, 2010, pp. 377–385.","ama":"Jungeblut T, Sievers G, Porrmann M, Rückert U. Design Space Exploration for Memory Subsystems of VLIW Architectures. In: <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i>. IEEE; 2010:377-385. doi:<a href=\"https://doi.org/10.1109/NAS.2010.14\">10.1109/NAS.2010.14</a>","mla":"Jungeblut, Thorsten, et al. “Design Space Exploration for Memory Subsystems of VLIW Architectures.” <i>2010 IEEE Fifth International Conference on Networking, Architecture, and Storage</i>, IEEE, 2010, pp. 377–85, doi:<a href=\"https://doi.org/10.1109/NAS.2010.14\">10.1109/NAS.2010.14</a>."},"author":[{"orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0001-7425-8766/work/157812798","id":"242294","first_name":"Thorsten","last_name":"Jungeblut","full_name":"Jungeblut, Thorsten","orcid":"0000-0001-7425-8766"},{"last_name":"Sievers","full_name":"Sievers, Gregor","first_name":"Gregor"},{"first_name":"Mario","last_name":"Porrmann","full_name":"Porrmann, Mario"},{"full_name":"Rückert, Ulrich","last_name":"Rückert","first_name":"Ulrich"}],"language":[{"iso":"eng"}],"year":"2010","_id":"4505"}]