[{"_id":"4496","year":"2015","language":[{"iso":"eng"}],"citation":{"ama":"Ax J, Sievers G, Flasskamp M, Kelly W, Jungeblut T, Porrmann M. System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In: <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>. New York, NY, USA: ACM; 2015:3-8. doi:<a href=\"https://doi.org/10.1145/2835512.2835513\">10.1145/2835512.2835513</a>","mla":"Ax, Johannes, et al. “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs.” <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>, ACM, 2015, pp. 3–8, doi:<a href=\"https://doi.org/10.1145/2835512.2835513\">10.1145/2835512.2835513</a>.","chicago":"Ax, Johannes, Gregor Sievers, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, and Mario Porrmann. “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs.” In <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>, 3–8. New York, NY, USA: ACM, 2015. <a href=\"https://doi.org/10.1145/2835512.2835513\">https://doi.org/10.1145/2835512.2835513</a>.","short":"J. Ax, G. Sievers, M. Flasskamp, W. Kelly, T. Jungeblut, M. Porrmann, in: Proceedings of the 8th International Workshop on Network on Chip Architectures, ACM, New York, NY, USA, 2015, pp. 3–8.","apa":"Ax, J., Sievers, G., Flasskamp, M., Kelly, W., Jungeblut, T., &#38; Porrmann, M. (2015). System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i> (pp. 3–8). New York, NY, USA: ACM. <a href=\"https://doi.org/10.1145/2835512.2835513\">https://doi.org/10.1145/2835512.2835513</a>","bibtex":"@inproceedings{Ax_Sievers_Flasskamp_Kelly_Jungeblut_Porrmann_2015, place={New York, NY, USA}, title={System-Level Analysis of Network Interfaces for Hierarchical MPSoCs}, DOI={<a href=\"https://doi.org/10.1145/2835512.2835513\">10.1145/2835512.2835513</a>}, booktitle={Proceedings of the 8th International Workshop on Network on Chip Architectures}, publisher={ACM}, author={Ax, Johannes and Sievers, Gregor and Flasskamp, Martin and Kelly, Wayne and Jungeblut, Thorsten and Porrmann, Mario}, year={2015}, pages={3–8} }","alphadin":"<span style=\"font-variant:small-caps;\">Ax, Johannes</span> ; <span style=\"font-variant:small-caps;\">Sievers, Gregor</span> ; <span style=\"font-variant:small-caps;\">Flasskamp, Martin</span> ; <span style=\"font-variant:small-caps;\">Kelly, Wayne</span> ; <span style=\"font-variant:small-caps;\">Jungeblut, Thorsten</span> ; <span style=\"font-variant:small-caps;\">Porrmann, Mario</span>: System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In: <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>. New York, NY, USA : ACM, 2015, S. 3–8","ieee":"J. Ax, G. Sievers, M. Flasskamp, W. Kelly, T. Jungeblut, and M. Porrmann, “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs,” in <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>, Waikiki HI USA, 2015, pp. 3–8."},"author":[{"full_name":"Ax, Johannes","last_name":"Ax","first_name":"Johannes"},{"first_name":"Gregor","full_name":"Sievers, Gregor","last_name":"Sievers"},{"last_name":"Flasskamp","full_name":"Flasskamp, Martin","first_name":"Martin"},{"full_name":"Kelly, Wayne","last_name":"Kelly","first_name":"Wayne"},{"orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0001-7425-8766/work/157809267","id":"242294","first_name":"Thorsten","full_name":"Jungeblut, Thorsten","orcid":"0000-0001-7425-8766","last_name":"Jungeblut"},{"last_name":"Porrmann","full_name":"Porrmann, Mario","first_name":"Mario"}],"place":"New York, NY, USA","status":"public","conference":{"start_date":"2015-12-05","end_date":"2015-12-05","name":"NoCArc '15: International Workshop on Network on Chip Architectures","location":"Waikiki HI USA"},"doi":"10.1145/2835512.2835513","date_updated":"2026-03-17T15:29:01Z","publisher":"ACM","page":"3-8","type":"conference","publication_identifier":{"isbn":["9781450339636"]},"user_id":"220548","publication":"Proceedings of the 8th International Workshop on Network on Chip Architectures","publication_status":"published","date_created":"2024-04-16T10:32:27Z","title":"System-Level Analysis of Network Interfaces for Hierarchical MPSoCs"}]