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IEEE; 2015:1925-1928. doi:<a href=\"https://doi.org/10.1109/ISCAS.2015.7169049\">10.1109/ISCAS.2015.7169049</a>"},"author":[{"first_name":"Gregor","last_name":"Sievers","full_name":"Sievers, Gregor"},{"last_name":"Ax","full_name":"Ax, Johannes","first_name":"Johannes"},{"first_name":"Nils","full_name":"Kucza, Nils","last_name":"Kucza"},{"full_name":"Flaskamp, Martin","last_name":"Flaskamp","first_name":"Martin"},{"orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0001-7425-8766/work/157800205","id":"242294","first_name":"Thorsten","full_name":"Jungeblut, Thorsten","orcid":"0000-0001-7425-8766","last_name":"Jungeblut"},{"full_name":"Kelly, Wayne","last_name":"Kelly","first_name":"Wayne"},{"last_name":"Porrmann","full_name":"Porrmann, Mario","first_name":"Mario"},{"last_name":"Rückert","full_name":"Rückert, Ulrich","first_name":"Ulrich"}],"conference":{"name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Lisbon, Portugal","end_date":"2015-05-27","start_date":"2015-05-24"},"status":"public","doi":"10.1109/ISCAS.2015.7169049","page":"1925-1928","publisher":"IEEE","date_updated":"2026-03-17T15:29:01Z","publication_identifier":{"eisbn":["978-1-4799-8391-9"]},"type":"conference","user_id":"220548","publication_status":"published","publication":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","title":"Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI","date_created":"2024-04-16T10:32:24Z"},{"language":[{"iso":"eng"}],"year":"2015","_id":"4496","conference":{"name":"NoCArc '15: International Workshop on Network on Chip Architectures","location":"Waikiki HI USA","start_date":"2015-12-05","end_date":"2015-12-05"},"status":"public","place":"New York, NY, USA","author":[{"first_name":"Johannes","full_name":"Ax, Johannes","last_name":"Ax"},{"full_name":"Sievers, Gregor","last_name":"Sievers","first_name":"Gregor"},{"first_name":"Martin","last_name":"Flasskamp","full_name":"Flasskamp, Martin"},{"first_name":"Wayne","last_name":"Kelly","full_name":"Kelly, Wayne"},{"orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0001-7425-8766/work/157809267","id":"242294","first_name":"Thorsten","full_name":"Jungeblut, Thorsten","orcid":"0000-0001-7425-8766","last_name":"Jungeblut"},{"first_name":"Mario","last_name":"Porrmann","full_name":"Porrmann, Mario"}],"citation":{"alphadin":"<span style=\"font-variant:small-caps;\">Ax, Johannes</span> ; <span style=\"font-variant:small-caps;\">Sievers, Gregor</span> ; <span style=\"font-variant:small-caps;\">Flasskamp, Martin</span> ; <span style=\"font-variant:small-caps;\">Kelly, Wayne</span> ; <span style=\"font-variant:small-caps;\">Jungeblut, Thorsten</span> ; <span style=\"font-variant:small-caps;\">Porrmann, Mario</span>: System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In: <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i>. New York, NY, USA : ACM, 2015, S. 3–8","apa":"Ax, J., Sievers, G., Flasskamp, M., Kelly, W., Jungeblut, T., &#38; Porrmann, M. (2015). System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In <i>Proceedings of the 8th International Workshop on Network on Chip Architectures</i> (pp. 3–8). New York, NY, USA: ACM. <a href=\"https://doi.org/10.1145/2835512.2835513\">https://doi.org/10.1145/2835512.2835513</a>","bibtex":"@inproceedings{Ax_Sievers_Flasskamp_Kelly_Jungeblut_Porrmann_2015, place={New York, NY, USA}, title={System-Level Analysis of Network Interfaces for Hierarchical MPSoCs}, DOI={<a href=\"https://doi.org/10.1145/2835512.2835513\">10.1145/2835512.2835513</a>}, booktitle={Proceedings of the 8th International Workshop on Network on Chip Architectures}, publisher={ACM}, author={Ax, Johannes and Sievers, Gregor and Flasskamp, Martin and Kelly, Wayne and Jungeblut, Thorsten and Porrmann, Mario}, year={2015}, pages={3–8} }","ieee":"J. Ax, G. Sievers, M. Flasskamp, W. Kelly, T. Jungeblut, and M. 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